Using Timers in the MAXQ Famil

文章摘要：Dual Eight-Bit ModesTimer 2 can be operated in sixteen-bit mode (in which case there is just one counter available) or in eight-bit mode, which treats the counter as two eight-bit counters, which can be used independently. This allows for three additional functions for the timer circuitry. When in e

Using Timers in the MAXQ Famil,标签：计算机控制技术,工厂电气控制技术,http://www.88dzw.com
Dual Eight-Bit Modes
Timer 2 can be operated in sixteen-bit mode (in which case there is just one counter available) or in eight-bit mode, which treats the counter as two eight-bit counters, which can be used independently. This allows for three additional functions for the timer circuitry. When in eight-bit mode, the primary counter (the high counter) can be in used for Compare, Capture, or Counter functions while the secondary counter (the low counter) can be used for compare or PWM output.

Dual Compare
In this mode, each eight-bit counter counts individually and can be used to output a waveform, but each counter is sourced from the same internal clock source. Different frequencies and duty cycles of waveforms can be output on the two timer pins by using different reload and compare values for each eight-bit counter.

Capture/PWM
In this mode, one eight-bit counter (the high counter) works in capture mode to time the duration of an input signal. The other eight-bit counter (the low counter) operates in compare mode and can be used to output a waveform.

Counter/PWM
In this mode, one eight-bit counter (the high counter) works in counter mode to count transitions of an input signal. The other eight-bit counter (the low counter) operates in compare mode and can be used to output a waveform.

Options

Single Shot (SS2)
This option allows the counter to run as if the run bit (T2R) had been turned on, but only until the next overflow of the counter. The counter then reverts to using the run bit to determine if it will continue counting. When in eight-bit mode, this bit applies ONLY to the primary eight-bit counter (high counter).

Gating Enable (G2EN)
This option allows the counter to be turned off (that is, gated) for a period of time without the firmware needing to manually toggle the run bit (T2R). In compare and counter mode, gating applies to the source clock. In capture mode, gating applies to the reload event.

The gating is controlled by the value on the primary pin. This requires the primary pin to be an input (T2OE [0]=0), so the output waveform (if needed) must be output on the secondary (or B) pin. Gating control is only available on the primary input.

Polarity Select
The polarity bits (T2POL [0] and T2POL [1]) can be used to invert the output waveforms. When used for this function, they must be set before the respective output enable bits (T2OE [0] and T2OE [1]) are set. Setting the polarity bits after the enable bits are set has no effect. The T2POL [0] bit can also be used to invert the gating condition on the primary pin when it is not used as an output. The T2POL [0] bit also an additional meaning in capture mode when both edges are defined for capture. In this case it defines which edge starts a single shot cycle, and inhibits reloading on one edge if gating is enabled.

Output Enable
The output enable bits (T2OE [0] and T2OE [1]) determine if the primary and secondary pins are actively driven by the timer circuitry. When the output enable bits are turned off, these pins can be read as inputs using the respective Port Input register. When the primary pin is not enabled for output, it can be used to gate (turn off) the counter.

Clock selection
The T2CI bit (alternate clock select) and T2DIV [2:0] bits (clock divisor) are used to set the clock source and prescale factor used by the counter. T2CI is used to select between the system clock and the alternate clock. Either of these can then be prescaled by a factor of 2n (n is the value from 0 to 7 that is stored in T2DIV).

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