VHDL设计的串口通信程序

文章摘要： txd_buf(6 DOWNTO 0) <= txd_buf(7 DOWNTO 1); state_tras <= state_tras + "0001"; END IF; WHEN "0100" => 发送第4位 IF (clkbaud_tras = ’1’) THEN

VHDL设计的串口通信程序,标签：eda技术,eda技术实用教程,http://www.88dzw.com
                           txd_buf(6 DOWNTO 0) <= txd_buf(7 DOWNTO 1);   
                           state_tras <= state_tras + "0001";   
                        END IF;
               WHEN "0100" => 发送第4位
                        IF (clkbaud_tras = ’1’) THEN
                           txd_reg <= txd_buf(0);   
                           txd_buf(6 DOWNTO 0) <= txd_buf(7 DOWNTO 1);   
                           state_tras <= state_tras + "0001";   
                        END IF;
               WHEN "0101" => 发送第5位
                        IF (clkbaud_tras = ’1’) THEN
                           txd_reg <= txd_buf(0);   
                           txd_buf(6 DOWNTO 0) <= txd_buf(7 DOWNTO 1);   
                           state_tras <= state_tras + "0001";   
                        END IF;
               WHEN "0110" => 发送第6位
                        IF (clkbaud_tras = ’1’) THEN
                           txd_reg <= txd_buf(0);   
                           txd_buf(6 DOWNTO 0) <= txd_buf(7 DOWNTO 1);   

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