多功能波形发生器VHDL程序与仿真

[11-20 16:14:56]   来源:http://www.88dzw.com  FPGA   阅读:8518

文章摘要: end if; end if; if sss(0)='1' then if addr<63 then dd4:=conv_integer(ram(addr)); addr<=addr+1; elsif addr=63 then dd4:=conv_integer(ram(63)); addr<=0; end if;

多功能波形发生器VHDL程序与仿真,标签:fpga是什么,fpga教程,http://www.88dzw.com

                    end if;

                  end if;

                  if sss(0)='1' then

                    if addr<63 then dd4:=conv_integer(ram(addr)); addr<=addr+1;

                    elsif addr=63 then dd4:=conv_integer(ram(63)); addr<=0;

                    end if;                                --任意波波形数据dd4

                  end if;

                         ddd:=conv_std_logic_vector((dd0+dd1+dd2+dd3+dd4),10);

--波形线形叠加输出

                            dd<=ddd(9 downto 2);

                end if;

              else count:=count+1;

              end if;

            end if;

          else

            if coun0<qqq then coun0<=coun0+tmp; c<=c+1;

            else

              if count3<=c/2 then count3:=count3+1; dd<=amp0;

              elsif count3=c then count3:=1;dd<="00000000";

              else count3:=count3+1; dd<="00000000";

              end if;

            end if;

          end if; 

        end if;

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Tag:FPGAfpga是什么,fpga教程FPGA

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