多功能波形发生器VHDL程序与仿真
[11-20 16:14:56] 来源:http://www.88dzw.com FPGA 阅读:8518次
文章摘要: when 7 => lcd(7 downto 1)<="0001111"; when 8 => lcd(7 downto 1)<="0000000"; when 9 => lcd(7 downto 1)<="0000100";when others => lcd(7 downto 1)<="0000001";end case;end process;ym:process(clk) --正弦波在一个周期内时域上的64
多功能波形发生器VHDL程序与仿真,标签:fpga是什么,fpga教程,http://www.88dzw.comwhen 7 => lcd(7 downto 1)<="0001111";
when 8 => lcd(7 downto 1)<="0000000";
when 9 => lcd(7 downto 1)<="0000100";
when others => lcd(7 downto 1)<="0000001";
end case;
end process;
ym:process(clk) --正弦波在一个周期内时域上的64个采样点的波形数据
begin
if rising_edge(clk) then
case f is
when "00000000"=> d<="11111111" ; when "00000001"=> d<="11111110" ;
when "00000010"=> d<="11111100" ;when "00000011"=> d<="11111001" ;
when "00000100"=> d<="11110101" ; when "00000101"=> d<="11101111" ;
when "00000110"=> d<="11101001" ;when "00000111"=> d<="11100001" ;
when "00001000"=> d<="11011001" ; when "00001001"=> d<="11001111" ;
when "00001010"=> d<="11000101" ;when "00001011"=> d<="10111010" ;
when "00001100"=> d<="10101110" ; when "00001101"=> d<="10100010" ;
when "00001110"=> d<="10010110" ;when "00001111"=> d<="10001001" ;
when "00010000"=> d<="01111100" ; when "00010001"=> d<="01110000" ;
when "00010010"=> d<="01100011" ;when "00010011"=> d<="01010111" ;
when "00010100"=> d<="01001011" ; when "00010101"=> d<="01000000" ;
when "00010110"=> d<="00110101" ;when "00010111"=> d<="00101011" ;
when "00011000"=> d<="00100010" ; when "00011001"=> d<="00011010" ;
when "00011010"=> d<="00010011" ;when "00011011"=> d<="00001101" ;
when "00011100"=> d<="00001000" ; when "00011101"=> d<="00000100" ;
when "00011110"=> d<="00000001" ;when "00011111"=> d<="00000000" ;
when "00100000"=> d<="00000000" ; when "00100001"=> d<="00000001" ;
when "00100010"=> d<="00000100" ;when "00100011"=> d<="00001000" ;
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