多功能波形发生器VHDL程序与仿真

文章摘要：variable dd0,dd1,dd2,dd3,dd4 : integer range 0 to 255;variable adr : integer range 0 to 63;beginif rising_edge(clk) then if posting='1' then if count4=6249999 then count4:=0; adr:=conv_integer(Data3)*10+conv_integer(Data2);--存储单位地址 i

多功能波形发生器VHDL程序与仿真,标签：fpga是什么,fpga教程,http://www.88dzw.com

variable dd0,dd1,dd2,dd3,dd4 : integer range 0 to 255;

variable adr : integer range 0 to 63;

begin

if rising_edge(clk) then

    if posting='1' then                              

      if count4=6249999 then count4:=0;              

adr:=conv_integer(Data3)*10+conv_integer(Data2);--存储单位地址

        if adr<64 then  

          if set='1' then ram(adr)<=conv_std_logic_vector((conv_integer(Data1)*10

+conv_integer(Data0))*2,8); --对置入的任意波形数据进行储存

                elsif clr='1' then  adr:=0;                             --存储器所有单元清零

                  for i in 0 to 63 loop

                     ram(i)<=(others=>'0');

                     end loop;

          end if;

        end if;

      else count4:=count4+1;

      end if;

    else 

if set='1' then coun<=0; b<=0; coun0<=0;c<=0;z<=31;amp0<="01111111"; addr<=0;

tmp<=conv_integer(Data3)*1000+conv_integer(Data2)*100

+conv_integer(Data1)*10+conv_integer(Data0);      --频率数据

      amp<="01111111";                                     --幅值

      else

        if tmp>0 then

          if sw='0' then

            if coun<qq then coun<=coun+tmp; b<=b+1;    --频率到采样点间隔脉冲数转换 

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