verilog PS2键盘解码程序

文章摘要： num <= num+1'b1; temp_data[5] <= ps2k_data; //bit5 end 4'd7: begin num <= num+1'b1; temp_data[6] <= ps2k_data; //bit6 end4&

verilog PS2键盘解码程序,标签：eda技术,eda技术实用教程,http://www.88dzw.com
                         num <= num+1'b1;
                         temp_data[5] <= ps2k_data;  //bit5
                     end
              4'd7:  begin
                         num <= num+1'b1;
                         temp_data[6] <= ps2k_data;  //bit6
                     end
4'd8:  begin
                         num <= num+1'b1;
                         temp_data[7] <= ps2k_data;  //bit7
                     end
              4'd9:  begin
                         num <= num+1'b1;  //奇偶校验位，不做处理
                     end
              4'd10: begin
                         num <= 4'd0;  // num清零
                     end
              default: ;
              endcase
       end
end
reg key_f0;       //松键标志位，置1表示接收到数据8'hf0，再接收到下一个数据后清零
reg ps2_state_r;  //键盘当前状态，ps2_state_r=1表示有键被按下
always @ (posedge clk or negedge rst_n) begin //接收数据的相应处理，这里只对1byte的键值进行处理
    if(!rst_n) begin
           key_f0 <= 1'b0;
           ps2_state_r <= 1'b0;
       end
    else if(num==4'd10) begin   //刚传送完一个字节数据
           if(temp_data == 8'hf0) key_f0 <= 1'b1;

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